Shows how VHDL modelling fits into a design flow, starting from high-level design and proceeding through design and verification, synthesis, FPGA place and route, and final timing verification. This guide is suitable for Computer Organization and Digital Title: The Student's Guide to VHDL Author: Ashenden, Peter J. Publisher: Elsevier Science Ltd Publication Date: 2008/05/19 Number of Pages: 510 Binding Type: PAPERBACK Library of Congress: 2008011064 BRAND : ASHENDEN, PETER J. SKU : 9781558608658 UPC : 9781558608658
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